Bringing in an external team for an ASIC or SoC program is a real commitment — design decisions made early are expensive to unwind later. A few questions worth asking before you sign anything:
Some firms specialize narrowly (verification only, or physical design only); others cover the full RTL-to-tapeout flow. Neither is automatically better — but you should know which one you're hiring, so you're not left stitching together handoffs between vendors yourself.
A single staff-augmented engineer working inside your existing flow is a very different commitment from handing over a fixed-scope project end to end. Be wary of a partner who only offers one model — your needs at kickoff and at tapeout are rarely the same.
Node experience doesn't transfer cleanly. A team that's strong at a mature node like 28nm isn't necessarily ready for FinFET-specific challenges at 7nm or below. Ask directly which nodes and which foundries they've delivered signed-off silicon on — not just which tools they have licenses for.
An NDA before any technical discussion should be a given, not a negotiation. Ask how design data is stored and shared, and who on their side actually has access to your RTL and layout.
Every program hits friction somewhere. What matters is whether your partner surfaces it early with a clear plan, or lets you find out at the next milestone review. Ask how they communicate status — and ask for a straight answer about a past program that didn't go to plan.
If you're currently evaluating partners for an upcoming program, we're glad to have that direct conversation — including the parts that don't put us in the best light.
